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| (R) ISL55141, ISL55142, ISL55143 Evaluation Board User's Manual Application Note September 27, 2006 AN1270.0 Before Getting Started This document supplements the ISL55141, ISL55142, ISL55143 specification FN6230. Evaluation board users should review that document to obtain information on the part's basic functionality and power requirements. A most important note is before powering up the board, review the Power-up Sequence in that specification. There are many DC sources utilized, therefore a user may inadvertently mis-apply the power sources causing damage to the part. Take time to review the ISL55141, ISL55142, ISL55143 Data Sheet (FN6230) and become familiar with the part's basic functions and power options. Note also that FN6230 super cedes this document with respect to updates and modifications. Always refer to that document if discrepancies occur. No voltage should be greater than VCC or less than VEE. Also, VOH must be greater than VOL. Since there are so many variations of use, each evaluation board provides three jumpers relating to basic power strapping. All ISL55141, ISL55142, ISL55143 boards are designed essentially in the same fashion. This document provides the user with the information regarding the evaluation board design, circuitry layout and jumper options. 1 4 5 6 7 VEE QA QB VOL VOH PD CVB VINP CVA VCC VEE 14 12 11 10 9 8 ISL55141_TSSOP FIGURE 1. THERE ARE NO GROUND PINS ON THESE COMPARATORS. VEE ALWAYS PROVIDES THE MOST NEGATIVE POWER CONNECTION. JP01 VOL = VEE 1 2 VOL VEE VCC C4 C3 +4.7F 0.1F VEE TP04_VCC_VEE DIF-DIF+ JP02 JP03 VOL = GND VEE = GND 1 2 1 GND GND VOL 2 GND - Banana Jack VCC - Banana Jack VEE - Banana Jack VOH TP03-VOH_VOL VOL - Banana Jack DIF+ C1 C2 +4.7F 0.1F DIF-VOL Jumper Options - VEE, VOL and GND First, VEE can be negative with respect to ground for receiving negative input ranges on the VINPs (comparator Inputs). The comparator outputs QA, QB toggle between VOH and VOL. VOL could also be a negative voltage, although this is usually not the case. VOL should never be more negative than VEE. For single supply operations, the user may wish to connect VEE to ground and VOL as well. Therefore, on each evaluation board there are positions for three jumpers (JP01, JP02, JP03). The user should make note that the ISL55141, ISL55142, ISL55143 all operate with VEE as the negative reference. There are no actual ground connection to the comparators unless VEE itself is connected to ground. VOH - Banana Jack FIGURE 2. THREE JUMPERS ARE AVAILABLE TO SET USER POWER STRAPPING OPTIONS. Before beginning the evaluation, the user should determine the desired relationship between GND, VEE and VOL. JP01 Connects VOL to VEE Both VEE and VOL voltage busses are negative with respect to ground. Comparator receives negative inputs and translates the QA/QB outputs with a negative low voltage. JP02 Connects VOL to GND VOL low is connected to ground, VEE is negative with respect to ground. Comparator inputs operate below ground but QA/QB level translation in reference to ground. JP03 Connects VEE to GND Both VOL and VEE are referenced to ground. There are no negative voltage requirements with respect to Comparator Inputs or level translation on the QA/QB Outputs 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1270 Scope Probe Connections Another topic to cover before getting started is the evaluation board physical connections for waveform observations. On each schematic version you will see a component with pins designated as DIF+ and DIF-. This is not an active component but a dual pin header physically design to accommodate connection of active differential probes. This will minimize ground lead inductance and capacitive loading while make waveform observations. However, the user must also be mindful of max voltage limitations when using these types of probes. The ISL5514x comparators cover a large voltage range, so double check the probe's specifications. SCOPE PROBE CONNECTIONS DIF+ DIF-QA_J3 QA0 R1 50 VOL QB_J4 TP01-QA_VOL DIF+ DIF-QA0 QB0 VOL VOH 1 4 5 6 7 VEE QA QB VOL VOH PD CVB VINP CVA VCC VEE 14 12 11 10 9 8 QB0 R2 50 VOL TP02-QB_VOL DIF+ DIF-- ISL55141_TSSOP FIGURE 4. BNC CONNECTIONS ON THE QA/QB COMPARATOR OUTPUTS HAVE THE SHIELD CONNECTED TO THE VOL BUS. NOTE: YOU MAY WISH TO REMOVE THE 50 TERMINATIONS. VINP TP07-VINP DIF+ DIF-R18 0 R14 0 R20 NOT POPULATED GND GND CVB_BUS CVA_BUS VCC VEE VINP VINP_J8 QA_J3 QA0 R1 50 VOL TP01-QA_VOL DIF+ DIF-PD CVB VINP CVA VCC VEE _TSSOP 14 12 11 10 9 8 TP07-VINP DIF+ DIF-- R18 0 R14 0 R20 NOT POPULATED GND VINP_J8 GND FIGURE 5. BNC CONNECTIONS ON THE HIGH SPEED VINP PINS HAVE THE SHIELD CONNECTED TO GND. NOTE: TWO SMD SERIES POSITIONS PLUS ONE POSITION TO GROUND ARE AVAILABLE FOR USER SPECIFIC CIRCUITRY. FIGURE 3. DUAL1" SPACED PINS ARE PLACED ON THE EVALUATION BOARDS FOR DIFFERENTIAL PROBE CONNECTIONS Power-Down Feature All boards provide the same capability for testing the power-down feature. A SPDT- center OFF switch is provided for manual testing of the feature. In one position the PD input is connected to VCC (Power-down enabled). In the other position the PD Input is connected to VEE (power-down disabled). S1 - POWER-DOWN CONTROL SPDT - CENTER OFF VDD VEE PD PD - BN_J5 Scope probe test points (TP) are positioned across all inputs, outputs and VCC and VEE. BNC Connections This series of evaluation boards also provides BNC connections for input and output signals. A key point to remember is the ISL55141, ISL55142, ISL55143 comparator outputs (QA/QB) operate with the VOH voltage as a High and VOL voltage as a Low. QA/QB BNC's, which are connected to the outputs, have the shield connected to the VOL voltage bus. Keep this in mind when making BNC connections to avoid connecting the GND shield of the BNC inputs to the VOL shield of the BNC outputs. Also note that the comparator outputs have 50 terminations that you may need to remove for your application. GND 1 4 5 6 7 VEE QA QB VOL VOH PD CVB VINP CVA VCC VEE 14 12 11 10 9 8 ISL55141_TSSOP FIGURE 6. ALL ISL5514X EVALUATION BOARDS HAVE THE SAME POWER-DOWN CIRCUITRY. 2 AN1270.0 September 27, 2006 Application Note 1270 Finally the center off position provides a means of connecting a repetitive signal source to the PD input. This is so the user can observe power-down enable/disable timing. An important note to remember when using the PD - BNC: 1. Place the switch in center-off position. 2. The PD input is referenced to VCC/VEE. The low amplitude of the PD input must match the VEE voltage. The high amplitude must be close to VCC. Initial Power-Up Please refer to the device specification for power-up sequencing and current requirements. Also note that the frequency of operation and number of comparators will determine the current needed. There are graphs in the specification regarding current characteristics. When first powering up the device, set all power bus inputs to minimum current levels needed for quiescent operation. Check the device out statically with DC inputs on the VINP pins and observe that the QA/QB outputs toggle when the VINP voltage crosses the CVA and CVB thresholds. Once static observations check out, you can then increase power current limits for VCC/VEE and VOH/VOL and apply higher frequency inputs to the VINP pins. Comparator Threshold Rails Each comparator has two thresholds. CVA/CVB. The data sheet explains the operation of these analog inputs. However, it should be mentioned that while the ISL55142 (Dual) and ISL55143 (QUAD) comparators have separate threshold inputs for each comparator, the evaluation boards have all CVA inputs tied to single CVA_BUS. Accordingly, all CVB inputs are tied to a single CVB_BUS. Layout Information All evaluation boards have complete silk-screen information regarding test points, jumpers and component placements. The silk-screen on the board you receive will provide up-to-date layout information. 34 33 32 31 VCC VEE VCC VEE PD 28 CVB_BUS 27 26 25 24 23 22 21 20 19 2 3 4 5 6 7 8 9 QA0 QB0 QA1 QB1 QA2 QB2 QA3 QB3 CVB0 VINP0 CVA0 CVB1 VINP1 CVA1 CVB2 VINP2 CVA2 VOH VOL VOH VOL VEE VCC CVA3 VINP3 CVB3 Schematic Information Schematics are drawn with physical location in mind. Any changes in electrical circuitry will be updated in this document as needed. Included in the following pages are three schematics. ISL55141 single comparator device, ISL55142 dual comparator and ISL55143 quad comparator device. The Evaluation boards are laid out for the TSSOP packages for the ISL55141 and ISL55142, while the ISL55143 is the QFN package. Please refer to the device specification for part numbers/options for these and other package ordering. CVA_BUS ISL55143_QFN 10 11 12 13 14 15 16 17 18 Bill of Material A bill of material of the ISL55142 evaluation board is included on page 6. It provides sources for special components such as the BNC connectors and banana jacks. All other parts are QPL standard passive components. Refer to device specification (FN6230) when ordering replacements for actual ISL55141, ISL55142 or ISL55143 devices. FIGURE 7. ISL55142 AND ISL55143 COMPARATOR THRESHOLD CVA/CVB INPUTS ARE TIED TOGETHER TO EITHER THE CVA_BUS OR CVB_BUS. 3 AN1270.0 September 27, 2006 Application Note 1270 ISL55142IVZ Evaluation Board Schematic S1 - POWER-DOWN CONTROL SPDT - CENTER OFF VDD VEE PD VINP PD - BN_J5 TP07-VINP DIF+ DIF-QA_J3 QA0 R1 50 VOL QB_J4 TP01-QA_VOL DIF+ DIF-1 4 5 6 7 VEE QA QB VOL VOH PD CVB VINP CVA VCC VEE GND 14 12 CVB_BUS 11 10 CVA_BUS VCC 9 8 VEE VINP CVB_BUS TP06_CVB DIF+ DIF-GND GND CVA_BUS TP05_CVA VOH TP03-VOH_VOL VOL - Banana Jack C1 C2 +4.7F 0.1F DIF+ DIF-VOH - Banana Jack VOL JP02 JP03 VOL = GND VEE = GND 1 2 1 VOL GND 2 VOL 1 2 JP01 VOL = VEE VEE DIF+ DIF-GND TP04_VCC_VEE C4 +4.7F VEE C3 0.1F DIF-DIF+ GND CVA_BUS C6 0.1F C8 +4.7F J11-CVA - Banana Jack J10-GND - Banana Jack CVB_BUS C5 0.1F C7 +4.7F J9-CVB - Banana Jack R18 0 R14 0 R20 NOT POPULATED GND VINP_J8 QB0 R2 50 VOL TP02-QB_VOL DIF+ DIF-- ISL55141_TSSOP VCC GND GND - Banana Jack VCC - Banana Jack VEE - Banana Jack FIGURE 8. ISL55141IVZ TSSOP SINGLE COMPARATOR EVALUATION BOARD SCHEMATIC 4 AN1270.0 September 27, 2006 ISL55142IVZ Evaluation Board Schematic S1 - POWER-DOWN CONTROL SPDT - CENTER OFF VINP0_J8 R18 0 R14 0 R20 NOT POPULATED GND VINP0 TP10-VINP0 DIF+ DIF-PD GND CVA_BUS QA0_J3 QA0 R1 50 VOL QB0_J4 TP01-QA0_VOL DIF+ DIF-VINP0 VEE VCC VOH VOL 1 2 3 4 5 6 7 8 9 10 . CVB0 VINP0 CVA0 PD VEE VCC VOH VOL QA0 QB0 CVB1 VINP1 CVA1 VCC VEE QB1 QA1 20 19 18 16 15 12 11 VEE VDD PD - BN_J5 VINP1 TP07-VINP1 DIF+ DIF-- R8 0 R10 0 R9 NOT POPULATED GND GND VINP1_J14 GND 1 2 C4 C3 C9 +4.7F 0.1F 0.1F VEE DIF-- DIF+ 1 2 1 TP03-VOH_VOL VOL - Banana Jack C2 C1 +4.7F 0.1F DIF+ DIF-VOH - Banana Jack VOL VOL GND GND 2 5 QB0 R2 50 VOL TP02-QB0_VOL DIF+ DIF-VOL QA0 QB0 TP10-QB1_VOL CVB_BUS VCC VEE QB1 QA1 QB1 R7 50 VOL QA1_J12 QB1_J13 VINP1 DIF+ DIF-- Application Note 1270 TP09-QA1_VOL DIF+ DIF-- QA1 R6 50 VOL CVB_BUS TP06_CVB DIF+ DIF-- ISL55142IVZ_TSSOP JP01 VOL = VEE VEE JP02 VOL = GND VOH JP03 VEE = GND VCC TP04_VCC_VEE CVB_BUS C5 0.1F GND GND J10-GND - Banana Jack C7 + 4.7F J9-CVB - Banana Jack CVA_BUS TP05_CVA DIF+ GND - Banana Jack VCC - Banana Jack VEE - Banana Jack DIF-GND GND CVA_BUS C6 0.1F C8 +4.7F J11-CVA - Banana Jack FIGURE 9. ISL55142IVZ TSSOP DUAL COMPARATOR EVALUATION BOARD AN1270.0 September 27, 2006 Application Note 1270 ISL5514x Bill of Materials QTY 7 2 1 1 1 1 1 1 2 1 3 4 4 4 2 1 13 REF DES J3-J5, J8, J12-J14 J7, J10 J1 J20 J2 J6 J9 J11 C5, C6 S1 C2, C3, C9 C1, C4, C7, C8 R3, R5, R8, R10 R1, R2, R6, R7 R4, R9 U1 DESCRIPTION 50 PCB mount receptacle PART NUMBER 31-5329-52RFX MANUFACTURER AMPHENOL DELTRON DELTRON DELTRON DELTRON DELTRON DELTRON DELTRON TDK ITT CANNON-C&K GENERIC GENERIC GENERIC GENERIC GENERIC INTERSIL GENERIC Right angle PCB mount insulated socket - single (black) 571-0100 Right angle PCB mount insulated socket - single (blue) 571-0200 Right angle PCB mount insulated socket - single (brown) 571-0300 Right angle PCB mount insulated socket - single (green) 571-0400 Right angle PCB mount insulated socket - single (red) 571-0500 Right angle PCB mount insulated socket - single (white) 571-0600 Right angle PCB mount insulated socket - single (yellow) 571-0700 Multilayer cap Sealed subminiature toggle switch Multilayer cap Multilayer cap Thick film chip resistor Thick film chip resistor Thick film chip resistor (do not populate) High-speed CMOS window comparators (Pb-free) C1608X7R1H104K ET03SD1CBE H1045-00104-25V10 H1065-004R7-50VR25 H2511-00R00-1/16W1 H2513-049R9-1/8W1 H2513-DNP-DNP-1 ISL55142ARZ JUMPER2_100 JP01-JP03, TP01-TP010 Two-pin jumper 6 AN1270.0 September 27, 2006 Application Note 1270 ISL55143IRZ Evaluation Board Schematic VINP0 QA0_J3 QA0 R1 50 TP01-QA0_VOL DIF+ DIF-TP10-VINP0 DIF+ DIF-VINP1 QB0 R2 50 TP02-QB0_VOL DIF+ DIF-S1 - POWER-DOWN CONTROL SPDT - CENTER OFF VEE VDD PD - BN_J5 TP10-VINP1 DIF+ DIF-VINP2 QA1_J18 QA1 R12 50 TP03-QA1_VOL DIF+ DIF-VCC VEE QB1_J21 QB1 R16 50 TP05-QB1_VOL DIF+ DIF-QA0 QB0 QA1 QB1 2 3 4 5 6 7 8 9 QA0 QB0 QA1 QB1 QA2 QB2 QA3 QB3 VINP0 GND TP10-VINP2 DIF+ DIF-VINP3 TP10-VINP3 CVB_BUS 27 26 25 24 23 22 21 20 19 VINP1 DIF+ DIF-R3 0 R4 0 R8 0 R18 0 R14 0 R20 NOT POPULATED GND QB0_J4 GND R10 0 R9 NOT POPULATED GND GND R6 0 C9 NOT POPULATED GND GND R5 0 R4 NOT POPULATED GND GND CVB_BUS C5 0.1F GND GND CVA_BUS VINP3 JP01 VOL = VEE QA3_J12 QA3 R6 50 TP07-QA3_VOL DIF+ DIF-VOL QB3 R7 50 TP08-QB3_VOL DIF+ DIF-C1 C2 +4.7F 0.1F GND VOH TP03-VOH_VOL VOL - Banana Jack DIF+ DIF-VOH - Banana Jack VOL GND - Banana Jack VCC - Banana Jack VEE - Banana Jack TP15_CVA DIF+ DIF-1 2 VCC C3 C4 C9 +4.7F 0.1F 0.1F VEE TP01_VCC_VEE DIF-DIF+ CVA_BUS C6 0.1F GND GND J10-GND - Banana Jack C7 +4.7F J9-CVB - Banana Jack VINP3_J8 VINP2_J14 VINP1_J15 VINP0_J16 34 33 32 31 VCC VEE VCC VEE PD CVB0 VINP0 CVA0 CVB1 VINP1 CVA1 CVB2 VINP2 CVA2 28 QA2_J17 QA2 R11 50 TP05-QA3_VOL DIF+ DIF-- QA2 QB2 QA3 QB3 CVB_BUS VINP2 TP16_CVB DIF+ DIF-CVA_BUS QB2_J21 QB2 R15 50 TP06-QB2_VOL DIF+ DIF-- VOH 10 11 12 13 14 15 16 17 18 VCC ISL55143_QFN VOH VOL VOH VOL VEE VCC CVA3 VINP3 CVB3 C8 +4.7F J11-CVA - Banana Jack JP02 VOL = GND 1 2 JP03 VEE = GND 1 2 QB3_J13 GND FIGURE 10. ISL55143IRZ QFN QUAD COMPARATOR EVALUATION BOARD Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 7 AN1270.0 September 27, 2006 |
Price & Availability of ISL55141
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